The voltage controlled oscillator ("VCO") circuit is well-known in electrical engineering for various applications. Frequently, a VCO is used in a phase-locked loop ("PLL") circuit to provide an output voltage signal having a predetermined frequency, or a frequency that varies in response to an external input. For example, PLLs are commonly used in digital (serial) data communications receivers for tracking the frequency of an incoming data signal.
The nominal oscillation frequency of a VCO is known as its center frequency. A scale factor relating a change in output frequency to a change in input (control) voltage is the VCO gain, generally expressed in MHz per volt. Jitter of a VCO can be generally defined as the instantaneous variation in output frequency from the desired output frequency, and is usually a result of noise on the voltage control input terminal and noise coupled through the power supplies.
Conventionally, CMOS VCO's are simple current-controlled ring oscillators formed as a chain of inverters. The output frequency control is realized by a programmable MOS current source that limits the current available to the inverter chain, which in turn affects the propagation delay through each inverter. This causes a change in the oscillation frequency. A simplified schematic illustrating the traditional VCO circuit is shown in FIG. 1.
A primary problem with the conventional VCO design is that the VCO gain is usually very high, which makes the circuit more susceptible to noise. Additionally, the lack of noise immunity results in high output jitter. Conventional VCO designs are especially poor at realizing high nominal output frequency with a low VCO gain, since the tranconductance of the controlling current source is inherently coupled to its nominal DC current. High oscillation frequency requires high nominal bias current, while low gain requires low transconductance (which typically requires low current). The importance of this problem is growing because of demands for ever-higher bandwidth in communications applications, networking, telecom, internet, etc.
Another disadvantage of known VCO designs is that the nominal process variations that occur in fabrication of the VCO circuit cause errors in the nominal center frequency of the oscillator. This necessitates a higher VCO gain since the circuit must be able to compensate for the shift in center frequency by altering the nominal control voltage. To illustrate, FIG. 2A is an illustrative plot of frequency versus control voltage with relatively high gain. Curve A shows the frequency versus voltage characteristic as designed. Curve B shows the same characteristic shifted as a result of process variation. As illustrated, the desired center frequency Fcenter1 can still be achieved by use of shifting the control voltage to VC2. FIG. 2B, on the other hand, illustrates the low-gain case. Again, curve A shows the frequency characteristic as designed, while curve B shows the frequency characteristic shifted due to process variation. Here, there is no control voltage between the limits, Vlow and Vhigh, which can produce the designed center frequency, Fcenter1, on the shifted curve B. Thus, the prior art forces the designer to increase the VCO gain, albeit at the expense of noise immunity and jitter.